DA9066 Datasheet | Renesas

Description DA9066 bines an ultra-low-power audio codec with core power management functions targeting standalone application processors and mobile phones. All linear regulators use Dialog’s Smart Mirror™ dynamic biasing technique, which maintains high performance over a wide range of operating conditions and a power saving mode (Sleep mode) to minimize the quiescent current. The regulators have output voltages independently programmable via the device control interface. The buck converters do not require external Schottky diodes and offer a Sleep mode (PFM mode) for optimal efficiency at low-load currents. All DC-DC converters use a 2 MHz or 3 MHz switching frequency giving high efficiency and allowing the use of small external inductors (down to 1 µH). Beside the power modules there are different core modules like real time clock (RTC), general purpose 12-bit ADC (GPADC) and general purpose IO pins (GPIO) implemented on the IC. These support different functions such as battery voltage supervision and device over-temperature protection. DA9066 can be pletely controlled from the host software writes to registers, which brings high flexibility to the design of applications. DA9066 contains an audio codec, which supports simultaneously stereo line input with up to three microphones with dual switchable bias. prehensive analog mixing and bypass paths to the output drivers are available. By optimizing both the power and signal chain paths for performance and efficiency it can provide 98 d B SNR at the headphone while consuming less than 5 m W from the battery. The headphone output is true-ground with integrated charge pump. A dedicated mono line out channel is provided for speaker or beep functionality. Digital audio transfer to and from the external processor is via bidirectional I2S interface which supports all mon sample rates. The device may be operated in slave or master modes using the internal phase-locked loop (PLL), which may be powered down. To fully optimize...