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HD74HC573 - Octal Transparent Latches

This page provides the datasheet information for the HD74HC573, a member of the HD74HC563 Octal Transparent Latches family.

Description

When the latch enable (LE) input is high, the Q outputs of HD74HC563 will follow the inversion of the D inputs and the Q outputs of HD74HC573 will follow the D inputs.

When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again.

Features

  • High Speed Operation: tpd (Data to Q, Q) = 11 ns typ (CL = 50 pF).
  • High Output Current: Fanout of 15 LSTTL Loads.
  • Wide Operating Voltage: VCC = 2 to 6 V.
  • Low Input Current: 1 µA max.
  • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C).
  • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74HC563P HD74HC573P DILP-20 pin PRDP0020AC-B (DP-20NEV) P HD74HC563FPEL SOP-20 pin (JEI.

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Datasheet Details

Part number HD74HC573
Manufacturer Renesas Electronics
File Size 132.07 KB
Description Octal Transparent Latches
Datasheet download datasheet HD74HC573 Datasheet
Additional preview pages of the HD74HC573 datasheet.

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Full PDF Text Transcription

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HD74HC563, HD74HC573 Octal Transparent Latches (with 3-state outputs) REJ03D0629-0200 (Previous ADE-205-509) Rev.2.00 Mar 30, 2006 Description When the latch enable (LE) input is high, the Q outputs of HD74HC563 will follow the inversion of the D inputs and the Q outputs of HD74HC573 will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.
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