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Renesas Electronics Components Datasheet

HD74LS194AP Datasheet

4-bit Bidirectional Universal Shift Register

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HD74LS194A
4-bit Bidirectional Universal Shift Register
REJ03D0456–0300
Rev.3.00
Jul.15.2005
The bidirectional shift register is designed to incorporate virtually all of the features a system designer may want in a
shift register. The circuit contains 46 equivalent gates and features parallel inputs, parallel outputs, right-shift and left-
shift serial inputs. Operating-mode-control inputs, and a direct overriding clear line. The register has four distinct
modes of operation, namely;
Parallel (broadside) load
Shift right (in the direction QA toward QD)
Shift left (in the direction QD toward QA)
Inhibit clock (do nothing)
Synchronous parallel loading is accomplished by applying the four bits of data and taking both mode control inputs, S0
and S1, high. The data are loaded into the associated flip-flops and appear at the outputs after the positive transition of
the clock input. During loading, serial data flow is inhibited. Shift right is accomplished synchronously with the rising
edge of the clock pulse when S0 is high and S1 is low. Serial data for this mode is entered at the shift-right data input.
When S0 is low and S1 is high, data shifts left synchronously and new data is entered at the shift-left serial input.
Clocking of the flip-flop is inhibited when both mode control inputs are low.
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74LS194AP
DILP-16 pin
PRDP0016AE-B
(DP-16FV)
P
HD74LS194AFPEL SOP-16 pin (JEITA)
PRSP0016DH-B
FP
(FP-16DAV)
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
Pin Arrangement
Clear 1
Shift Right
Serial Input
2
A3
Parallel B 4
Inputs C 5
D6
Shift Left
Serial Input
7
GND 8
CLR
R
QA
A
QB
B
QC
C
QD
D CK
L
S1
S0
(Top view)
16 VCC
15 QA
14 QB Parallel
13 QC Outputs
12 QD
11 Clock
10 S1
9 S0
Mode
Control
Rev.3.00, Jul.15.2005, page 1 of 7


Renesas Electronics Components Datasheet

HD74LS194AP Datasheet

4-bit Bidirectional Universal Shift Register

No Preview Available !

HD74LS194A
Function Table
Inputs
Outputs
Mode
Serial
Clear
Clock
S1
S0
Left Right A
Parallel
B
C
D
QA
QB
QC
QD
L
X
X
X
X
X
X
X
X
X
L
L
L
L
H
X
X
L
X
X
X
X
X
X
QA0
QB0
QC0
QD0
H
H
H
X
X
a
b
c
d
a
b
c
d
H
L
H
X
H
X
X
X
X
H
QAn
QBn
QCn
H
L
H
X
L
X
X
X
X
L
QAn
QBn
QCn
H
H
L
H
X
X
X
X
X
QBn
QCn
QDn
H
H
H
L
L
X
X
X
X
X
QBn
QCn
QDn
L
H
L
L
X
X
X
X
X
X
X
QAo
QBo
QCo
QDo
Notes: 1. H; high level, L; low level, X; irrelevant
2. ; transition from low to high level
3. a to d; the level of steady-state input at inputs A, B, C, or D, respectively
4. QA0 to QD0; the level of QA, QB, QC, or QD, respectively before the indicated steady-state input conditions were
established.
5. QAn to QDn; the level of QA, QB, QC, or QD, respectively before the most-recent transition of the clock.
Block Diagram
Parallel Inputs
A
B
C
D
Mode S1
Control
Inputs S0
Shift
Right
Serial
Input
Shift
Left
Serial
Input
Clock
Clear
S QA
CK
R
Clear
S QB
CK
R
Clear
S QC
CK
R
Clear
S QD
CK
R
Clear
QA
QB
QC
QD
Parallel Outputs
Rev.3.00, Jul.15.2005, page 2 of 7


Part Number HD74LS194AP
Description 4-bit Bidirectional Universal Shift Register
Maker Renesas
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