Octal Bus Transceivers (with three-state outputs)
This octal bus transceiver is designed for synchronous two-way communication between data buses. The control
function implementation minimizes external timing requirements. The device allows data transmission from the A bus
to the B bus or from the B bus to the A bus depending upon the logic level at the direction control (DIR) input. The
enable input (G) can be used to disable the device so that the buses are effectively isolated.
• Ordering Information
HD74LS245FPEL SOP-20 pin (JEITA)
HD74LS245RPEL SOP-20 pin (JEDEC) PRSP0020DC-A
Note: Please consult the sales office for the above package availability.
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
19 Enable G
Rev.3.00, Jul.15.2005, page 1 of 5