HD74LS273 Datasheet Octal D-type Positive-edge-triggered Flip-Flops

Manufacturer: Renesas

HD74LS273 octal d-type positive-edge-triggered flip-flops by Renesas - Datasheet Preview

Datasheet Details

Part number	HD74LS273
Manufacturer	Renesas
File Size	88.28 KB
Description	Octal D-type Positive-edge-triggered Flip-Flops
Datasheet	HD74LS273 Datasheet

Overview

HD74LS273 Octal D-type Positive-edge-triggered Flip-Flops (with Clear) REJ03D0473–0300 Rev.3.00 Jul.15.2005 The HD74LS273, positive-edge-triggered flip-flops utilize LS TTL circuitry to implement D-type flip-flop logic with a direct clear input.

Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse.

When the clock input is at either the high or low level, the D input signal has no effect at the output.

Key Features

Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74LS273P DILP-20 pin PRDP0020AC-B (DP-20NEV) P HD74LS273FPEL SOP-20 pin (JEITA) PRSP0020DD-B (FP-20DAV) FP HD74LS273RPEL SOP-20 pin (JEDEC) PRSP0020DC-A (FP-20DBV) RP Note: Please consult the sales office for the above package availability. Taping Abbreviation (Quantity).
EL (2,000 pcs/reel) EL (1,000 pcs/reel) Pin Arrangement Clear 1 1Q 2 1D 3 2D 4 2Q 5 3Q 6 3D 7.

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