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HD74LS273P - Octal D-type Positive-edge-triggered Flip-Flops

Download the HD74LS273P datasheet PDF. This datasheet also covers the HD74LS273 variant, as both devices belong to the same octal d-type positive-edge-triggered flip-flops family and are provided as variant models within a single manufacturer datasheet.

Features

  • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74LS273P DILP-20 pin PRDP0020AC-B (DP-20NEV) P HD74LS273FPEL SOP-20 pin (JEITA) PRSP0020DD-B FP (FP-20DAV) HD74LS273RPEL SOP-20 pin (JEDEC) PRSP0020DC-A (FP-20DBV) RP Note: Please consult the sales office for the above package availability. Taping Abbreviation (Quantity).
  • EL (2,000 pcs/reel) EL (1,000 pcs/reel) Pin Arrangement Clear 1 1Q 2 1D 3 2D 4 2Q 5 3Q 6 3D.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HD74LS273-Renesas.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number HD74LS273P
Manufacturer Renesas
File Size 88.28 KB
Description Octal D-type Positive-edge-triggered Flip-Flops
Datasheet download datasheet HD74LS273P Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
HD74LS273 Octal D-type Positive-edge-triggered Flip-Flops (with Clear) REJ03D0473–0300 Rev.3.00 Jul.15.2005 The HD74LS273, positive-edge-triggered flip-flops utilize LS TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output.
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