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HD74LS280P Datasheet

9-bit Odd / Even Parity Generator/Checker

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HD74LS280
9-bit Odd / Even Parity Generator / Checker
REJ03D0475–0300
Rev.3.00
Jul.15.2005
This parity generator / checker offers the designer a trade-off between reduced power consumption and high
performance. Although the HD74LS280 is implemented without expander inputs, the corresponding function is
provided by the availability of an input at pin 4 and the absence of any internal connection at pin 3.
Features
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74LS280P
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
PRSP0014DF-B
HD74LS280FPEL SOP-14 pin (JEITA)
(FP-14DAV)
FP
Notes: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
Pin Arrangement
G1
Inputs
H2
NC 3
Input I 4
Σ
Outputs Even
5
Σ
Odd
6
GND 7
G
H
F
E
I
D
Σ Even C
Σ Odd B
A
(Top view)
14 VCC
13 F
12 E
11 D
10 C
Inputs
9B
8A
Function Table
Number of inputs A through I that are high
0, 2, 4, 6, 8
1, 3, 5, 7, 9
Σ Even
H
L
Outputs
Σ Odd
L
H
Rev.3.00, Jul.15.2005, page 1 of 5


Renesas Electronics Components Datasheet

HD74LS280P Datasheet

9-bit Odd / Even Parity Generator/Checker

No Preview Available !

HD74LS280
Block Diagram
A
B
C
D
E
F
G
H
I
Σ Even
Σ Odd
Absolute Maximum Ratings
Item
Symbol
Ratings
Supply voltage
VCC
7
Input voltage
VIN
7
Power dissipation
PT
400
Storage temperature
Tstg
–65 to +150
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Item
Supply voltage
Output current
Operating temperature
Symbol
VCC
IOH
IOL
Topr
Min
4.75
–20
Typ
5.00
25
Max
5.25
–400
8
75
Unit
V
V
mW
°C
Unit
V
µA
mA
°C
Rev.3.00, Jul.15.2005, page 2 of 5


Part Number HD74LS280P
Description 9-bit Odd / Even Parity Generator/Checker
Maker Renesas
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HD74LS280P Datasheet PDF






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