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HD74LS283P - 4-bit Binary Full Adder

Download the HD74LS283P datasheet PDF. This datasheet also covers the HD74LS283 variant, as both devices belong to the same 4-bit binary full adder family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation HD74LS283P DILP-16 pin PRDP0016AE-B P (DP-16FV) HD74LS283FPEL SOP-16 pin (JEITA) PRSP0016DH-B (FP-16DAV) FP Note: Please consult the sales office for the above package availability. Taping Abbreviation (Quantity).
  • EL (2,000 pcs/reel) Pin Arrangement Σ2 1 B2 2 A2 3 Σ1 4 A1 5 B1 6 C0 7 GND 8 Σ2 B2 B3 A2 A3 Σ1 Σ3 A1 A4 B1 B4 C0 Σ4 C4 16 VCC 15 B3 14 A3 13 Σ.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HD74LS283-Renesas.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number HD74LS283P
Manufacturer Renesas
File Size 213.72 KB
Description 4-bit Binary Full Adder
Datasheet download datasheet HD74LS283P Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
HD74LS283 4-bit Binary Full Adders Hitachi Semiconductor
HD74LS280 9-bit Odd/Even Parity Generators/Checkers Hitachi Semiconductor
HD74LS20 Dual 4-input Positive NAND Gates Hitachi Semiconductor
HD74LS21 Dual 4-input Positive AND Gates Hitachi Semiconductor
HD74LS22 Dual 4-input Positive NAND Gates Hitachi Semiconductor

Other Datasheets by Renesas

Part Number Description
HD74LS283 4-bit Binary Full Adder
HD74LS280 9-bit Odd / Even Parity Generator/Checker
HD74LS280P 9-bit Odd / Even Parity Generator/Checker
HD74LS20 Dual 4-input Positive NAND Gates
HD74LS20P Dual 4-input Positive NAND Gates

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
HD74LS283 4-bit Binary Full Adder REJ03D0476–0300 Rev.3.00 Jul.15.2005 The HD74LS283 adder is electrically and functionally identical to the HD74LS83A, respectively; only the arrangement of the terminals has been changed. This improved full adder performs the addition of two 4-bit binary words. The sum (Σ) outputs are provided for each bit and the resultant carry (C4) is obtained from the fourth bits generating the carry term in then nanoseconds. The adder logic, including the carry, is implemented in its true form. End around carry can be accomplished without the need for logic or level inversion.