HD74LS48P Datasheet | Renesas

features active high outputs for driving lamp buffers. This circuit has full ripple blanking input / output controls and a lamp test input. Display patterns for BCD input counts above 9 are unique symbols to authenticate input conditions. This circuit incorporates automatic leading and / or trailing-edge zero-blanking control (RBI and RBO). Lamp test (LT) of these types may be performed at any time when the BI / RBO node is at a high level. It contains an overriding blanking input (BI) which can be used to control the lamp intensity be pulsing or to inhibit the outputs. Inputs and outputs are entirely patible for use with TTL or DTL logic outputs. Features - Ordering Information Part Name HD74LS48P Package Type DILP-16 pin Package Code (Previous Code) PRDP0016AE-B (DP-16FV) Package Abbreviation Taping Abbreviation (Quantity) - Pin Arrangement B1 Inputs C2 Lamp Test BI/RBO 4 RBI 5 D6 Inputs A7 GND 8 B f C g LT a BI/RBO b RBI c D d A e 16 VCC 15 f 14 g 13 a 12 b Outputs 11 c 10 d 9e (Top view) Rev.3.00, Jul.22.2005, page 1 of 6 HD74LS48 Function Table Decimal or Inputs BI / Outputs Function LT RBI D C B A RBO a b c d e f Note g H H...