Quadruple Bistable Latches
May 10, 2006
The HD74LS75 is ideally suited for use as temporary storage for binary information between processing units and
input / output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable
(G) is high and the Q output will follow the data input as long as the enable remains high. When the enable goes low,
the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the
enable is permitted to go high. This device features complementary Q and Q outputs from a 4-bit latch.
• Ordering Information
Package Code Package
(Previous Code) Abbreviation
HD74LS75FPEL SOP-16 pin (JEITA)
Note: Please consult the sales office for the above package availability.
EL (2,000 pcs/reel)
Enable 3-4 4
13 Enable 1-2
Rev.3.00, May 10, 2006, page 1 of 5