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ICS348 Datasheet

QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER

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DATASHEET
QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER
ICS348
Description
The ICS348 field programmable clock synthesizer
generates up to 9 high-quality, high-frequency clock outputs
including multiple reference clocks from a low frequency
crystal or clock input. The ICS348 has 4 independent
on-chip PLLs and is designed to replace crystals and
crystal oscillators in most electronic systems.
Using IDT’s VersaClockTM software to configure PLLs and
outputs, the ICS348 contains a One-Time Programmable
(OTP) ROM to allow field programmability. Programming
features include eight selectable configuration registers, up
to two sets of four low-skew outputs.
Using Phase-Locked Loop (PLL) techniques, the device
runs from a standard fundamental mode, inexpensive
crystal, or clock. It can replace multiple crystals and
oscillators, saving board space and cost.
The ICS348 is also available in factory programmed custom
versions for high-volume applications.
Features
Packaged as 20-pin SSOP (QSOP) (Pb-free)
Eight addressable registers
Replaces multiple crystals and oscillators
Output frequencies up to 200 MHz at 3.3V
Input crystal frequency of 5 to 27 MHz
Input clock frequency of 2 to 50 MHz
Up to nine reference outputs
Up to two sets of four low-skew outputs
Operating voltages of 3.3 V
Advanced, low power CMOS process
For one output clock, use the ICS341 (8-pin). For two
output clocks, use the ICS342 (8-pin). For three output
clocks, use the ICS343 (8-pin). For more than three
outputs, use the ICS345 or ICS348.
Block Diagram
S2:S0
3
OTP
ROM
w ith
PLL
V a lu e s
Crystal or
clock input
X1/ICLK
X2
Crystal
O s c illa to r
External capacitors are
required with a crystal input.
VDD 3
PLL1
PLL2
PLL3
PLL4
Divide
Logic
and
Output
Enable
Control
GND 2
PDTS
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
CLK7
CLK8
CLK9
IDT® QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER
1
ICS348
REV N 090613


Renesas Electronics Components Datasheet

ICS348 Datasheet

QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER

No Preview Available !

ICS348
QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER
EPROM CLOCK SYNTHESIZER
Pin Assignment
X1/ICLK 1
S0 2
S1 3
CLK9 4
VDD 5
GND 6
CLK1 7
CLK2 8
CLK3 9
CLK4 10
20 X2
19 VDD
18 PDTS
17 S2
16 VDD
15 GND
14 CLK5
13 CLK6
12 CLK7
11 CLK8
20-pin (150 mil) SSOP (QSOP)
Pin Descriptions
Pin
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin
Name
X1
S0
S1
CLK9
VDD
GND
CLK1
CLK2
CLK3
CLK4
CLK8
CLK7
CLK6
CLK5
GND
VDD
S2
PDTS
VDD
X2
Pin
Type
XI
Input
Input
Output
Power
Power
Output
Output
Output
Output
Output
Output
Output
Output
Power
Power
Input
Input
Power
XO
Pin Description
Crystal Input. Connect this pin to a crystal or external input clock.
Select pin 0. Internal pull-up resistor.
Select pin 1. Internal pull-up resistor.
Output clock 9. Weak internal pull-down when tri-state.
Connect to +3.3 V.
Connect to ground.
Output clock 1. Weak internal pull-down when tri-state.
Output clock 2. Weak internal pull-down when tri-state.
Output clock 3. Weak internal pull-down when tri-state.
Output clock 4. Weak internal pull-down when tri-state.
Output clock 8. Weak internal pull-down when tri-state.
Output clock 7. Weak internal pull-down when tri-state.
Output clock 6. Weak internal pull-down when tri-state.
Output clock 5. Weak internal pull-down when tri-state.
Connect to ground.
Connect to +3.3 V.
Select pin 2. Internal pull-up resistor.
Power down tri-state. Powers down entire chip and tri-states clock outputs
when low. Internal pull-up resistor.
Connect to +3.3 V.
Crystal Output. Connect this pin to a fundamental crystal. Float for clock input.
IDT® QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER
2
ICS348
REV N 090613



Part Number ICS348
Description QUAD PLL FIELD PROGRAMMABLE VERSACLOCK SYNTHESIZER
Maker Renesas
Total Page 3 Pages
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ICS348 Datasheet PDF





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