ICS557G-03LF Datasheet PDF (2 OUTPUT PCI-EXPRESS GEN1 CLOCK SOURCE)

ICS557G-03LF - 2 OUTPUT PCI-EXPRESS GEN1 CLOCK SOURCE

This page provides the datasheet information for the ICS557G-03LF, a member of the ICS557-03 2 OUTPUT PCI-EXPRESS GEN1 CLOCK SOURCE family.

Description

The ICS557-03 is a spread spectrum clock generator that supports PCI-Express Gen 1 and Ethernet requirements.

The device is used for PC or embedded systems to substantially reduce electromagnetic interference (EMI).

The device provides two differential (HCSL) spread spectrum outputs.

Features

Packaged in 16-pin TSSOP.
RoHS 5 (green) or RoHS 6 (green and lead free) compliant packaging.
Supports HCSL or LVDS output levels.
Operating voltage of 3.3 V.
Input frequency of 25 MHz.
Jitter 60 ps (cycle-to-cycle).
Spread Spectrum capability.
Industrial and commercial temperature ranges.
For PCIe Gen2.

Datasheet Details

Part number	ICS557G-03LF
Manufacturer	Renesas
File Size	285.65 KB
Description	2 OUTPUT PCI-EXPRESS GEN1 CLOCK SOURCE
Datasheet	ICS557G-03LF Datasheet
Additional preview pages of the ICS557G-03LF datasheet.

📁 Similar Datasheet

ICS557-01 - PCI-EXPRESS CLOCK SOURCE (ICST)

ICS557-03 - spread spectrum clock generator (IDT)

ICS557-05A - Quad Differential PCI-Express Clock Source (ICST)

ICS557-06 - ONE TO FOUR HCSL CLOCK BUFFER (ICST)

ICS557-08 - 2:1 MULTIPLEXER CHIP (ICST)

ICS551 - 1 TO 4 CLOCK BUFFER (IDT)

ICS552-01A - Crystal Oscillator & Multiplier (ICST)

ICS552-02 - LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER (ICST)

ICS552-03 - LOW SKEW 1 TO 8 CLOCK BUFFER (ICST)

ICS552A-01 - Oscillator Multiplier and Buffer (ICST)

Full PDF Text Transcription

Click to expand full text

2 OUTPUT PCI-EXPRESS GEN1 CLOCK SOURCE DATASHEET ICS557-03 Description The ICS557-03 is a spread spectrum clock generator that supports PCI-Express Gen 1 and Ethernet requirements. The device is used for PC or embedded systems to substantially reduce electromagnetic interference (EMI). The device provides two differential (HCSL) spread spectrum outputs. The spread type and amount are configured via select pin. Using IDT’s patented Phase-Locked Loop (PLL) techniques, the device takes a 25 MHz crystal input and produces two pairs of differential outputs at 25 MHz, 100 MHz, 125 MHz or 200 MHz clock frequencies for HCSL, and 25 MHz or 100 MHz for LVDS.

Published: Jul 9, 2021 |