low phase noise clock multiplier.
* Packaged in 16-pin SOIC or TSSOP
* Pb (lead) free package
* Uses fundamental 10 - 27 MHz crystal or clock
* Patented PLL with the lowest phase noise
which require low phase noise and low jitter. It is IDT’s lowest phase noise multiplier, and also the lowest CMOS part i.
The ICS601-01 is a low-cost, low phase noise, high-performance clock synthesizer for applications which require low phase noise and low jitter. It is IDT’s lowest phase noise multiplier, and also the lowest CMOS part in the industry. Using IDT’s pate.
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