ICS662-03 Datasheet | Renesas

HDTV AUDIO/VIDEO CLOCK SOURCE Description The ICS662-03 provides synchronous clock generation for audio sampling clock rates derived from an HDTV stream. The device uses the latest PLL technology to provide superior phase noise and long term jitter performance. The device also supports a 27 MHz output clock for video MPEG applications from an HDTV reference clock. Please contact IDT if you have a requirement for an input and output frequency not included here. Features - Packaged in 8-pin SOIC - Pb (lead) free package, Ro HS pliant - HDTV clock input - Low phase noise - Exact (0 ppm) multiplication ratios - Support for 256 and 384 times sampling rate - Supports 27 MHz output for video (MPEG) Block Diagram SEL3:0 Control Circuitry REF_IN PLL Clock Synthesis IDT™ / ICS™ HDTV AUDIO/VIDEO CLOCK SOURCE ICS662-03 REV G 051310 ICS662-03 HDTV AUDIO/VIDEO CLOCK SOURCE CLOCK SYNTHESIZER Pin Assignment REF_IN VDD GND S2 1 2 3 4 8 S0 7 S3 6 S1 5 CLK 8 pin (150 mil) SOIC Pin Descriptions Output Clock Selection Table Input Output...