ICS841402I Datasheet | Renesas

Femto Clock® Crystal-to-0.7V Differential HCSL Clock Generator General Description The ICS841402I is an optimized PCIe and s RIO clock generator. The device uses a 25MHz parallel resonant crystal to generate 100MHz, 125MHz, 200MHz and 400MHz clock signals, replacing solutions requiring multiple oscillator and fanout buffer solutions. The device has excellent phase jitter suitable to clock ponents requiring precise and low jitter PCIe, s RIO or both clock signals. The device also supports a configurable spread-spectrum generation for PCIe applications. Designed for tele, networking and industrial applications, the ICS841402I can also drive the high-speed s RIO and PCIe Ser Des clock inputs of munications processors, DSPs, switches and bridges. DATA SHEET Features - Two 0.7V differential HCSL outputs: configurable for PCIe (100MHz or 200MHz) and s RIO (125MHz) clock signals - One LVCMOS/LVTTL reference clock output - Selectable crystal oscillator interface, 25MHz, 18p F parallel resonant crystal or LVCMOS/LVTTL single-ended reference clock input - Supports the following output frequencies: 100MHz, 125MHz, 200MHz or 400MHz - VCO frequency range: 950MHz - 1.25GHz - Configurable spread-spectrum generation for PCIe - PLL bypass and output enable - RMS phase jitter @ 200MHz, using a 25MHz crystal (12k Hz - 20MHz): 1.21ps (typical) - PCI Express (2.5 Gb/S), Gen 2 (5 Gb/s) and Gen 3 (8 Gb/s) jitter pliant (REF_OUT disabled) - Full 3.3V operating supply - -40°C to 85°C ambient operating temperature - Available in lead-free (Ro HS 6) packages Block Diagram OE_REFOUT Pulldown 25MHz XTAL_IN XTAL_OUT REF_IN Pulldown 0...