ICS853S54I Datasheet - Renesas

Differential-to-LVPECL/ECL Multiplexer

ICS853S54I Features

* Three differential LVPECL output pairs

* Three differential LVPECL clock inputs

* PCLKx/nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML

* Maximum output frequency: 2.5GHz

* Part-to-part skew: 200ps (maximum)

* Propa

ICS853S54I General Description

The ICS853S54I is a dual 2:1 and 1:2 Multiplexer. The 2:1 Multiplexer allows one of 2 inputs to be selected onto one output pin and the 1:2 MUX switches one input to one of two outputs. This device is useful for multiplexing multi-rate Ethernet PHYs which have 100 M bit and 1000 bit transmit/receive.

ICS853S54I Datasheet (486.04 KB)