IDT2308A - 3.3V ZERO DELAY CLOCK BUFFER

Renesas

General Description

The IDT2308A is a high-speed phase-lock loop (PLL) clock multiplier.

It is designed to address high-speed clock distribution and multiplication applications.

The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz.

Key Features

Phase-Lock Loop Clock Distribution for.

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IDT2308A 3.3v zero delay clock buffer by Renesas - Datasheet Preview

Datasheet Details

Part number	IDT2308A
Manufacturer	Renesas
File Size	202.17 KB
Description	3.3V ZERO DELAY CLOCK BUFFER
Datasheet	IDT2308A Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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IDT2308A 3.3V ZERO DELAY CLOCK MULTIPLIER COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 3.3V ZERO DELAY CLOCK MULTIPLIER IDT2308A FEATURES: • Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency • Distributes one clock input to two banks of four outputs • Separate output enable for each output bank • External feedback (FBK) pin is used to synchronize the outputs to the clock input • Output Skew <200 ps • Low jitter <200 ps cycle-to-cycle • 1x, 2x, 4x output options (see table): – IDT2308A-1 1x – IDT2308A-2 1x, 2x – IDT2308A-3 2x, 4x – IDT2308A-4 2x – IDT2308A-1H and -2H for High Drive • No external RC network required • Operates at 3.