IDT6116SA Datasheet | Renesas

CMOS Static RAM 16K (2K x 8-Bit) IDT6116SA IDT6116LA Features - High-speed access and chip select times - Military: 20/25/35/45/55/70/90/120/150ns (max.) - Industrial: 20/25ns (max.) - mercial: 15/20/25ns (max.) - Low-power consumption - Battery backup operation - 2V data retention voltage (LA version only) - Produced with advanced CMOS high-performance technology - CMOS process virtually eliminates alpha particle soft-error rates - Input and output directly TTL-patible - Static operation: no clocks or refresh required - Available in ceramic 24-pin DIP, ceramic and plastic 24-pin Thin Dip and 24-pin SOIC - Military product pliant to MIL-STD-833, Class B Description The IDT6116SA/LA is a 16,384-bit high-speed static RAM organized as 2K x 8. It is fabricated using high-performance, high-reliability CMOS technology. Access times as fast as 15ns are available. The circuit also offers a reduced power standby mode. When CS goes HIGH, the circuit will automaticallygoto,andremainin,astandbypowermode,aslongas CS remains HIGH. This capability provides significant system level power and coolingsavings. Thelow-power(LA)versionalsooffersabatterybackup data retention capability where the circuit typically consumes only 1µW to 4µW operating off a 2V battery. All inputs and outputs of the IDT6116SA/LA are TTL-patible. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. The IDT6116SA/LA is packaged in 24-pin 300mil plastic DIP, 24-pin 600mil and 300mil ceramic DIP, or 24-lead gull-wing SOIC providing high board-level packing densities. Militarygradeproductismanufacturedinplianceto MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability. Functional Block Diagram A0 A10 I/O0 I/O7 CS OE WE ADDRESS DECODER INPUT DATA...