IDT74ALVCH16260 latch equivalent, 12-bit to 24-bit multiplexed d-type latch.
* 0.5 MICRON CMOS Technology
* Typical tSK(o) (Output Skew) < 250ps
* ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0).
* 3.3V high speed systems
* 3.3V and lower voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION:
Thi.
This 12-bit to 24-bit multiplexed D-type latch is built using advanced dual metal CMOS technology. The ALVCH16260 is used in applications in which two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical a.
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