IDT82V3002A Datasheet - Renesas

WAN PLL

IDT82V3002A Features

* Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces

* Supports ITU-T G.813 Option 1 clocks for 2048 kbit/s interfaces

* Supports ITU-T G.812 Type IV clocks for 1544 kbit/s interface and 2048 kbit/s interface

IDT82V3002A General Description

The IDT82V3002A is a WAN PLL with dual reference inputs. It contains a Digital Phase-Locked Loop (DPLL), which generates ST-BUS clocks and framing signals that are phase locked to a 2.048 MHz, 1.544 MHz or 8 kHz input reference. The IDT82V3002A provides eight types of clock signals (C1.5o, C3o, C6o,.

IDT82V3002A Datasheet (1.41 MB)