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IDT8SLVP1104I - LVPECL Output Fanout Buffer

General Description

The IDT8SLVP1104I is a high-performance differential LVPECL fanout buffer.

The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals.

The IDT8SLVP1104I is characterized to operate from a 3.3V or 2.5V power supply.

Key Features

  • Four low skew, low additive jitter LVPECL differential output pairs.
  • Differential LVPECL input pair can accept the following differential input levels: LVDS, LVPECL, CML.
  • Differential PCLKx pairs can also accept single-ended LVCMOS levels. See the.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Low Phase Noise, 1-to-4, 3.3V, 2.5V LVPECL Output Fanout Buffer IDT8SLVP1104I DATASHEET Description The IDT8SLVP1104I is a high-performance differential LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The IDT8SLVP1104I is characterized to operate from a 3.3V or 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the IDT8SLVP1104I ideal for those clock distribution applications demanding well-defined performance and repeatability.Four low skew outputs are available. The integrated bias voltage reference enables easy interfacing of single-ended signals to the device inputs. The device is optimized for low power consumption and low additive phase noise.