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ISL22346 Datasheet

Quad Digitally Controlled Potentiometers

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DATASHEET
ISL22346
Quad Digitally Controlled Potentiometers (XDCP™) Low Noise, Low Power I2C™
Bus, 128 Taps
FN6177
Rev 2.00
September 3, 2009
The ISL22346 integrates four digitally controlled potentiometers
(DCP) and non-volatile memory on a monolithic CMOS
integrated circuit.
The digitally controlled potentiometers are implemented with
a combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
I2C bus interface. Each potentiometer has an associated
volatile Wiper Register (WR) and a non-volatile Initial Value
Register (IVR) that can be directly written to and read by the
user. The contents of the WR controls the position of the
wiper. At power-up the device recalls the contents of the two
DCP’s IVR to the corresponding WRs.
The DCPs can be used as a three-terminal potentiometers
or as a two-terminal variable resistors in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Features
• Four potentiometers in one package
• 128 resistor taps
• I2C serial interface
- Three address pins, up to eight devices/bus
• Non-volatile storage of wiper position
• Wiper resistance: 70typical @ VCC = 3.3V
• Shutdown mode
• Shutdown current 5µA max
• Power supply: 2.7V to 5.5V
• 50kor 10ktotal resistance
• High reliability
- Endurance: 1,000,000 data changes per bit per register
- Register data retention: 50 years @ T < +55°C
• 20 Ld TSSOP or 20 Ld TQFN package
• Pb-free (RoHS compliant)
Pinouts
ISL22346
(20 LD TSSOP)
TOP VIEW
ISL22346
(20 LD TQFN)
TOP VIEW
RH3
RL3
RW3
A2
SCL
SDA
GND
RW2
RL2
RH2
1
2
3
4
5
6
7
8
9
10
20 RW0
19 RL0
18 RH0
17 SHDN
16 VCC
15 A1
14 A0
13 RH1
12 RL1
11 RW1
O 20 19 18 17 16
RL0
RW0
RH3
RL3
RW3
1
2
3
4
5
15 RH1
14 RL1
13 RW1
12 RH2
11 RL2
6 7 8 9 10
FN6177 Rev 2.00
September 3, 2009
Page 1 of 16


Renesas Electronics Components Datasheet

ISL22346 Datasheet

Quad Digitally Controlled Potentiometers

No Preview Available !

ISL22346
Ordering Information
PART NUMBER
(Note)
PART
MARKING
RESISTANCE OPTION
(k)
TEMP. RANGE
(°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL22346UFV20Z*
22346 UFVZ
50
-40 to +125
20 Ld TSSOP
M20.173
ISL22346UFRT20Z*
223 46UFZ
50
-40 to +125
20 Ld 4x4 TQFN
L20.4x4A
ISL22346WFV20Z*
22346 WFVZ
10
-40 to +125
20 Ld TSSOP
M20.173
ISL22346WFRT20Z*
223 46WFZ
10
-40 to +125
20 Ld 4x4 TQFN
L20.4x4A
*Add “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Block Diagram
VCC
SCL
SDA
A0
A1
A2
I2C
INTERFACE
SHDN
POWER-UP
INTERFACE,
CONTROL
AND STATUS
LOGIC
NON-
VOLATILE
REGISTERS
WR3
WR2
WR1
WR0
RH3
RW3
RL3
RH2
RW2
RL2
RH1
RW1
RL1
RH0
RW0
RL0
GND
Pin Descriptions
TSSOP PIN
NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TQFN PIN
NUMBER
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PIN NAME
RH3
RL3
RW3
A2
SCL
SDA
GND
RW2
RL2
RH2
RW1
RL1
RH1
A0
DESCRIPTION
“High” terminal of DCP3
“Low” terminal of DCP3
“Wiper” terminal of DCP3
Device address input for the I2C interface
Open drain I2C interface clock input
Open drain Serial data I/O for the I2C interface
Device ground pin
“Wiper” terminal of DCP2
“Low” terminal of DCP2
“High” terminal of DCP2
“Wiper” terminal of DCP1
“Low” terminal of DCP1
“High” terminal of DCP1
Device address input for the I2C interface
FN6177 Rev 2.00
September 3, 2009
Page 2 of 16


Part Number ISL22346
Description Quad Digitally Controlled Potentiometers
Maker Renesas
Total Page 16 Pages
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