ISL23425 Datasheet - Renesas

ISL23425 Low Voltage Digitally Controlled Potentiometer

TSSOP 1, 7 2 µTQFN 5, 6, 15 16 31 42 53 64 88 99 10 10 11 11 12 12 13 13 14 14 7 SYMBOL DESCRIPTION GND Ground pin VLOGIC SPI bus/logic supply Range 1.2V to 5.5V SDO Logic Pin - Serial bus data output (configurable) SCK Logic Pin - Serial bus clock input SDI Logic Pin - Serial bus data .

DATASHEET ISL23425 Dual, 256-Tap, Low Voltage Digitally Controlled Potentiometer (XDCP™) FN7873 Rev 1.00 September 11, 2015 The ISL23425 is a volatile, low voltage, low noise, low power, 256-tap, dual digitally controlled potentiometer (DCP) with an SPI Bus™ interface. It integrates two DCP cores, wiper switches and control logic on a monolithic CMOS integrated circuit. Each digitally controlled potentiometer is implemented with a combination of resistor elements and CMOS switches. The positi.

ISL23425 Features

* Two potentiometers per package

* 256 resistor taps

* 10k 50kor 100k total resistance

* SPI serial interface - No additional level translator for low bus supply - Daisy Chaining of multiple DCPs

* Maximum supply current without serial bus activity (stand

ISL23425 Datasheet (1.22 MB)