ISLA214P25 Datasheet | Renesas

Features - Single supply 1.8V operation - Clock duty cycle stabilizer - 75fs clock jitter - 700MHz bandwidth - Programmable built-in test patterns - Multi-ADC support - SPI programmable fine gain and offset control - Support for multiple ADC synchronization - Optimized output timing - Nap and sleep modes - 200µs sleep wake-up time - Data output clock - SDR/DDR LVDS-patible or LVCMOS outputs - Selectable clock divider Applications - Radar array processing - Software defined radios - Broadband munications - High-performance data acquisition - munications test equipment AVDD CLKDIV CLKDIVRSTP CLKDIVRSTN OVDD CLKP CLKN CLOCK MANAGEMENT CLKOUTP CLKOUTN VINP VINN 14-BIT 250 MSPS + - SPI CONTROL DIGITAL ERROR CORRECTION D[13:0]P D[13:0]N TABLE 1. PIN-PATIBLE FAMILY MODEL ISLA216P25 ISLA216P20 ISLA216P13 ISLA214P50 ISLA214P25 ISLA214P20 ISLA214P13 ISLA212P50 ISLA212P25 ISLA212P20 ISLA212P13 RESOLUTION 16 16 16 14 14 14 14 12 12 12 12 SPEED (MSPS) 250 200 130 500 250 200 130 500 250 200 130 AVSS NAPSLP...