MK1705A Datasheet | Renesas

Description The MK1705A generates a low EMI output clock from a clock or crystal input. The part is designed to dither the LCD interface clock or other clocks for ATI’s flat panel graphics controllers. The MK1705A uses IDT’s proprietary mixture of analog and digital Phase Locked Loop (PLL) technology to synthesize the frequency. It also uses IDT’s patented technique to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several d B. The MK1705A is designed to have the output spread centered around the input frequency. Refer to the MK1704A for spreading down from the input frequency or the MK1714-0x for a crystal input and the widest selection of spread rates and multipliers. IDT offers many other clocks for puters and puter peripherals. Consult IDT when you need to remove crystals and oscillators from your board. Note: When changing input frequency, the LEE pin must be set low for a minimum of 10µS to allow the PLL to lock to the new frequency. Alternatively, the PD pin maybe be set low while changing frequencies. Features - 8-pin SOIC package - Provides a spread spectrum output clock - Supports ATI’s flat panel controllers - Accepts a clock input, provides same frequency dithered output - Good for all VGA modes from 40 to 167 MHz - Peak reduction by 7 d B - 14 d B typical on 3rd - 19th odd harmonics - Low EMI feature can be disabled - Operating voltage of 3.3 V or 5 V - Advanced, low power CMOS process Block Diagram 2 S1:0 Low EMI Enable Power Down Input Clock Input Buffer PLL Clock Synthesis and Spread Spectrum Circuitry IDT™ ATI LOW EMI CLOCK GENERATOR REV E 101308 MK1705A ATI LOW EMI CLOCK GENERATOR Pin Assignment ICLK 1 VDD 2 GND 3 CLK 4 8 PD 7 S0 6 S1 5 LEE 8 pin (150 mil) SOIC SSCG Output Clock Selection Table S1 S0 pin 6 pin...