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MK2703 Datasheet

PLL AUDIO CLOCK SYNTHESIZER

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PLL AUDIO CLOCK SYNTHESIZER
DATASHEET
MK2703
Description
The MK2703 is a low-cost, low-jitter, high-performance PLL
clock synthesizer designed to replace oscillators and PLL
circuits in set-top box and multimedia systems. Using IDT’s
patented analog Phase Locked Loop (PLL) techniques, the
device uses a 27 MHz crystal or clock input to produce a
buffered reference clock and a selectable audio clock.
IDT manufactures the largest variety of Set-Top Box and
multimedia clock synthesizers for all applications. Consult
IDT to eliminate VCXOs, crystals and oscillators from your
board.
Block Diagram
Features
Packaged in 8-pin SOIC
Pb (lead) free package
Uses an inexpensive, fundamental mode crystal or clock
Supports MPEG sampling rates of 32 kHz, 44.1 kHz, 48
kHz, and 96 kHz
Patented zero ppm synthesis error in all clocks
All frequencies are frequency locked
Advanced, low power, sub-micron CMOS process
Operating voltage of 3.3 V or 5 V
Industrial temperature version available
The MK2703B is recommended for new designs
VDD
S1:0 2
X1
27 MHz
crystal or
clock input
X2
Crystal
Oscillator
PLL Clock
Synthesis
and Control
Circuitry
Capacitors are required for crystal tuning
GND
Audio Clock
27M
IDT™ PLL AUDIO CLOCK SYNTHESIZER
1
MK2703
REV K 051310


Renesas Electronics Components Datasheet

MK2703 Datasheet

PLL AUDIO CLOCK SYNTHESIZER

No Preview Available !

MK2703
PLL AUDIO CLOCK SYNTHESIZER
Pin Assignment
X1 1
VDD 2
GND 3
27M 4
8 X2
7 S0
6 S1
5 CLK
8-pin (150 mil) SOIC
CLOCK SYNTHESIZER
AUDIO CLOCK OUTPUT SELECT TABLE
S1 S0
0
0
0
1
1
0
1
1
CLK (MHz)
8.192
11.2896
12.288
24.576
Key: 0 = Connect pin directly to ground
1 = Connect pin directly to VDD
Pin Descriptions
Pin Pin
Number Name
1
X1
2
VDD
3
GND
4
27M
5
CLK
6
S1
7
S0
8
X2
Pin
Type
XI
Power
Power
Output
Output
Input
Input
XO
Pin Description
Crystal Connection. Connect to a 27 MHz fundamental crystal or clock.
Connect to +3.3 V or +5 V.
Connect to ground.
27 MHz buffered reference clock output.
Audio clock output per table above.
Audio clock frequency select input #1. Determines CLK output per table
above. Internal pull-up resistor.
Audio clock frequency select input #0. Determines CLK output per table
above. Internal pull-up resistor.
Crystal connection to a 27 MHz crystal, or leave unconnected for clock
output.
External Components
Decoupling Capacitor
As with any high-performance mixed-signal IC, the MK2703
must be isolated from system power supply noise to perform
optimally.
A decoupling capacitor of 0.01µF must be connected
between VDD and GND on pins 2 and 3. It must be
connected close to the MK2703 to minimize lead
inductance. No external power supply filtering is required for
the MK2703.
Series Termination Resistor
A 33terminating resistor can be used next to the clock
outputs for trace lengths over one inch.
Crystal Load Capacitors
The total on-chip capacitance is approximately 16 pF. A
parallel resonant, fundamental mode, AT cut 27 MHz crystal
should be used. The device crystal connections should
include pads for small capacitors from X1 to ground and
from X2 to ground. These capacitors are used to adjust the
IDT™ PLL AUDIO CLOCK SYNTHESIZER
2
MK2703
REV K 051310



Part Number MK2703
Description PLL AUDIO CLOCK SYNTHESIZER
Maker Renesas
Total Page 3 Pages
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MK2703 Datasheet PDF





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