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Renesas Electronics Components Datasheet

MK74CB218 Datasheet

CLOCK DRIVER

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DUAL 1 TO 8 BUFFALO™ CLOCK DRIVER
DATASHEET
MK74CB218
Description
The MK74CB218 Buffalo™ is a monolithic CMOS high
speed clock driver. It consists of two identical single input to
eight low-skew output, non-inverting clock drivers. This
eliminates concerns of part to part matching in many
systems. The MK74CB218 is packaged in the tiny 28-pin
SSOP, which uses the same board space as the narrow
16-pin SOIC. The inputs can be connected together for a 1
to 16 fanout buffer.
A quad 1 to 4, and PECL versions, are also available.
Consult IDT for more details.
The MK74CB218 can also act as a voltage translator, since
it is possible to run the inputs at 3.3 V and the outputs at
2.5 V.
Features
Packaged as 28-pin SSOP (150 mil body)
Pb (lead) free package, RoHS compliant
Dual one input to eight output clock drivers
Outputs are skew matched to within 250 ps
A outputs and B outputs matched to 250 ps
2.5 V or 3.3 V output voltages
Output Enable tri-states each bank of eight
Clock speeds up to 200 MHz
Family of IDT Parts
The MK74CB218 Buffalo™ is designed to be used with
IDT’s clock synthesizer devices. The inputs of the Buffalo
are matched to the outputs of IDT clock synthesizers.
Consult IDT for applications support.
Not recommended for new designs. See the
MK74CB218B for new designs.
Block Diagram
VDDA
VDD
VDDB
INA
QA0
QA1
QA2
QA3
QA4
QA5
QA6
QA7
OE (all outputs) GND
INB
QB0
QB1
QB2
QB3
QB4
QB5
QB6
QB7
IDT™ / ICS™ DUAL 1 TO 8 BUFFALO™ CLOCK DRIVER
1
MK74CB218 REV K 051310


Renesas Electronics Components Datasheet

MK74CB218 Datasheet

CLOCK DRIVER

No Preview Available !

MK74CB218
DUAL 1 TO 8 BUFFALO™ CLOCK DRIVER
FAN OUT BUFFER
Pin Assignment
Suggested Layout
INA 1
QA0 2
QA1 3
QA2 4
VDDA 5
VDDA 6
QA3 7
QA4 8
GND 9
GND 10
QA5 11
QA6 12
QA7 13
OE 14
Pin Descriptions
28
INB
27
QB0
26
QB1
25
QB2
24
VDDB
23
VDDB
22
QB3
21
QB4
20
GND
19
GND
18
QB5
17
QB6
16 QB7
15
VDD
A
0.01 µF
G
B
0.01 µF
G
0.01 µF
G
V
NOTE: 33 ohm series termination resistors for each output are
essential for operation.
For simplicity, series termination resistors are not shown for
the outputs, but should be placed as close to the device as
possible. It is most critical to have the 0.01 µF decoupling
capacitors closest.
A = connect to VDDA
B = connect to VDDB
V = connect to VDD
G = connect to low
inductance ground plane
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
INA
Input Clock input for eight A outputs.
2, 3, 4 QA0, QA1, QA2 Output Clock A outputs.
5, 6
VDDA
Power Power supply for QA outputs. Connect to a voltage from 2.5 V to VDD. Cannot exceed
VDD.
7, 8
QA3, QA4 Output Clock A outputs.
9, 10
GND
Power Connect to ground.
11, 12, 13 QA5, QA6, QA7 Output Clock A outputs.
14
OE
Input Output Enable. Tri-states all clock outputs when this input is low. Internal pull-up to VDD.
15
VDD
Power Power supply for inputs.
16, 17, 18 QB7, QB6, QB5 Output Clock B outputs.
19, 20
GND
Power Connect to ground.
21, 22
QB4, QB3 Output Clock B outputs.
23, 24
VDDB
Power Power supply for QB outputs. Connect to a voltage from 2.5 V to VDD. Cannot exceed
VDD.
25, 26, 27 QB2, QB1, QB0 Output Clock B outputs.
28
INB
Input Clock input for eight B outputs.
IDT™ / ICS™ DUAL 1 TO 8 BUFFALO™ CLOCK DRIVER
2
MK74CB218 REV K 051310


Part Number MK74CB218
Description CLOCK DRIVER
Maker Renesas
PDF Download

MK74CB218 Datasheet PDF






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