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NP60N03SUG Datasheet

N-CHANNEL POWER MOS FET

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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
NP60N03SUG
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
The NP60N03SUG is N-channel MOS Field Effect Transistor designed for high current switching applications.
ORDERING INFORMATION
PART NUMBER
NP60N03SUG-E1-AY Note
NP60N03SUG-E2-AY Note
LEAD PLATING
Pure Sn (Tin)
PACKING
Tape 2500 p/reel
Note Pb-free (This product does not contain Pb in external electrode.)
PACKAGE
TO-252 (MP-3ZK) typ. 0.27 g
FEATURES
Channel temperature 175 degree rated
Super low on-state resistance
RDS(on) = 3.8 mΩ MAX. (VGS = 10 V, ID = 30 A)
High current rating
ID(DC) = ±60 A
Low input capacitance
Ciss = 5000 pF TYP.
Designed for automotive application and AEC-Q101 qualified
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V)
VDSS
30
Gate to Source Voltage (VDS = 0 V)
VGSS
±20
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) Note1
ID(DC)
ID(pulse)
±60
±240
Total Power Dissipation (TC = 25°C)
PT1
105
Total Power Dissipation (TA = 25°C)
PT2
1.2
Channel Temperature
Tch 175
Storage Temperature
Repetitive Avalanche Current Note2
Repetitive Avalanche Energy Note2
Tstg 55 to +175
IAR 41
EAR 168
Notes 1. PW 10 μs, Duty Cycle 1%
2. Tch 150°C, RG = 25 Ω
V
V
A
A
W
W
°C
°C
A
mJ
(TO-252)
THERMAL RESISTANCE
Channel to Case Thermal Resistance
Channel to Ambient Thermal Resistance
Rth(ch-C)
Rth(ch-A)
1.43
125
°C/W
°C/W
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. D19547EJ1V0DS00 (1st edition)
Date Published November 2008 NS
Printed in Japan
2008


Renesas Electronics Components Datasheet

NP60N03SUG Datasheet

N-CHANNEL POWER MOS FET

No Preview Available !

NP60N03SUG
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
Zero Gate Voltage Drain Current
IDSS VDS = 30 V, VGS = 0 V
Gate Leakage Current
IGSS VGS = ±20 V, VDS = 0 V
Gate to Source Threshold Voltage
Forward Transfer Admittance Note
Drain to Source On-state Resistance Note
VGS(th)
| yfs |
RDS(on)
VDS = VGS, ID = 250 μA
VDS = 5 V, ID = 30 A
VGS = 10 V, ID = 30 A
Input Capacitance
Ciss VDS = 25 V,
Output Capacitance
Coss
VGS = 0 V,
Reverse Transfer Capacitance
Crss f = 1 MHz
Turn-on Delay Time
td(on)
VDD = 15 V, ID = 30 A,
Rise Time
tr VGS = 10 V,
Turn-off Delay Time
td(off)
RG = 0 Ω
Fall Time
tf
Total Gate Charge
QG VDD = 24 V,
Gate to Source Charge
QGS VGS = 10 V,
Gate to Drain Charge
Body Diode Forward Voltage Note
QGD
VF(S-D)
ID = 60 A
IF = 60 A, VGS = 0 V
Reverse Recovery Time
trr IF = 60 A, VGS = 0 V,
Reverse Recovery Charge
Note Pulsed test
Qrr di/dt = 100 A/μs
MIN. TYP. MAX. UNIT
1 μA
±100 nA
2.0 3.0 4.0
V
25 41
S
3.0 3.8 mΩ
5000 7500 pF
600 900 pF
420 760 pF
32 64 ns
20 49 ns
64 128 ns
13 30 ns
90 135 nC
24 nC
31 nC
0.9 1.5
V
42 ns
43 nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG = 25 Ω
PG.
VGS = 20 0 V
50 Ω
L
VDD
BVDSS
ID
VDD
IAS
VDS
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
RG
PG.
VGS
0
τ
τ = 1 μs
Duty Cycle 1%
RL
VDD
VGS
VGS
Wave Form
10%
0
VDS
90%
VDS
VDS
Wave Form
0
td(on)
VGS 90%
90%
10% 10%
tr td(off) tf
ton toff
D.U.T.
IG = 2 mA
PG. 50 Ω
RL
VDD
2 Data Sheet D19547EJ1V0DS


Part Number NP60N03SUG
Description N-CHANNEL POWER MOS FET
Maker Renesas
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