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R5F102A9ASP - MCU

This page provides the datasheet information for the R5F102A9ASP, a member of the R5F1026AASP MCU family.

Features

  • Ultra-low power consumption technology.
  • VDD = single power supply voltage of 1.8 to 5.5 V which can operate at a low voltage.
  • HALT mode.
  • STOP mode.
  • SNOOZE mode RL78 CPU core.
  • CISC architecture with 3-stage pipeline.
  • Minimum instruction execution time: Can be changed from high speed (0.04167 s: @ 24 MHz operation with high-speed on-chip oscillator) to ultra-low speed (1 s: @ 1 MHz operation).
  • Address space: 1 MB.
  • General-purpose registers: (8-bit register.

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Datasheet preview – R5F102A9ASP

Datasheet Details

Part number R5F102A9ASP
Manufacturer Renesas
File Size 1.11 MB
Description MCU
Datasheet download datasheet R5F102A9ASP Datasheet
Additional preview pages of the R5F102A9ASP datasheet.

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Full PDF Text Transcription

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Datasheet RL78/G12 RENESAS MCU R01DS0193EJ0230 Rev.2.30 Jun 19, 2020 True low-power platform (63 μA/MHz) for the general-purpose applications, with 1.8-V to 5.5-V operation, 2- to 16-Kbyte code flash memory, and 31 DMIPS at 24 MHz 1. OUTLINE 1.1 Features Ultra-low power consumption technology  VDD = single power supply voltage of 1.8 to 5.5 V which can operate at a low voltage  HALT mode  STOP mode  SNOOZE mode RL78 CPU core  CISC architecture with 3-stage pipeline  Minimum instruction execution time: Can be changed from high speed (0.
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