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R5F103A9DSP - MCU

Download the R5F103A9DSP datasheet PDF. This datasheet also covers the R5F1026AASP variant, as both devices belong to the same mcu family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Ultra-low power consumption technology.
  • VDD = single power supply voltage of 1.8 to 5.5 V which can operate at a low voltage.
  • HALT mode.
  • STOP mode.
  • SNOOZE mode RL78 CPU core.
  • CISC architecture with 3-stage pipeline.
  • Minimum instruction execution time: Can be changed from high speed (0.04167 s: @ 24 MHz operation with high-speed on-chip oscillator) to ultra-low speed (1 s: @ 1 MHz operation).
  • Address space: 1 MB.
  • General-purpose registers: (8-bit register.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (R5F1026AASP-Renesas.pdf) that lists specifications for multiple related part numbers.

Other Datasheets by Renesas

Part Number Description
R5F103A9ASP MCU
R5F103A7ASP MCU
R5F103A7DSP MCU
R5F103A8ASP MCU
R5F103A8DSP MCU
R5F103AAASP MCU
R5F103AADSP MCU
R5F10366ASP MCU
R5F10366DSP MCU
R5F10367ASP MCU

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Datasheet RL78/G12 RENESAS MCU R01DS0193EJ0230 Rev.2.30 Jun 19, 2020 True low-power platform (63 μA/MHz) for the general-purpose applications, with 1.8-V to 5.5-V operation, 2- to 16-Kbyte code flash memory, and 31 DMIPS at 24 MHz 1. OUTLINE 1.1 Features Ultra-low power consumption technology  VDD = single power supply voltage of 1.8 to 5.5 V which can operate at a low voltage  HALT mode  STOP mode  SNOOZE mode RL78 CPU core  CISC architecture with 3-stage pipeline  Minimum instruction execution time: Can be changed from high speed (0.