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R5F10Y14DSP - MCU

Download the R5F10Y14DSP datasheet PDF. This datasheet also covers the R5F10Y17ASP variant, as both devices belong to the same mcu family and are provided as variant models within a single manufacturer datasheet.

Features

  • Ultra-Low Power Technology.
  • 2.0 to 5.5 V operation from a single supply.
  • Stop (RAM retained): 0.56 µA.
  • Operating: 46 µA /MHz RL78-S1 Core.
  • Instruction execution: 78 % of instructions can be executed in 1 to 2 clock cycles.
  • CISC architecture (Harvard) with 3-stage pipeline.
  • Multiply: 8 x 8 to 16-bit result in 2 clock cycles.
  • 16-bit barrel shifter for shift & rotate in 2 clock cycle.
  • 1-wire on-chip debug function Main Flash Me.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (R5F10Y17ASP-Renesas.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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Other Datasheets by Renesas

Part Number Description
R5F10Y14 MCU
R5F10Y14ASP MCU
R5F10Y16 MCU
R5F10Y16ASP MCU
R5F10Y16DSP MCU

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Datasheet RL78/G10 RENESAS MCU True Low Power Platform (as low as 46 μA/MHz), 2.0 to 5.5V Operation, 1 to 4 Kbyte Flash for General Purpose Applications R01DS0207EJ0310 Rev.3.10 Aug 12, 2016 1. OUTLINE 1.1 Features Ultra-Low Power Technology • 2.0 to 5.5 V operation from a single supply • Stop (RAM retained): 0.56 µA • Operating: 46 µA /MHz RL78-S1 Core • Instruction execution: 78 % of instructions can be executed in 1 to 2 clock cycles • CISC architecture (Harvard) with 3-stage pipeline • Multiply: 8 x 8 to 16-bit result in 2 clock cycles • 16-bit barrel shifter for shift & rotate in 2 clock cycle • 1-wire on-chip debug function Main Flash Memory • Density: 1 to 4 Kbyte • Flash memory rewritable voltage: 4.5 to 5.
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