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R5F364AENFA - MCU

This page provides the datasheet information for the R5F364AENFA, a member of the R5F364A6NFA MCU family.

Description

CPU Central processing unit M16C/60 Series core (multiplier: 16 bit × 16 bit  32 bit, multiply and accumulate instruction: 16 bit × 16 bit + 32 bit  32 bit) Number of basic instructions: 91 Minimum instruction execution time: 40.0 ns (f(BCLK) = 25 MHz, VCC1 = VCC2 = 2.7 to 5

Features

  • The M16C/64A Group microcomputer (MCU) incorporates the M16C/60 Series CPU core and flash memory, employing sophisticated instructions for a high level of efficiency. This MCU has 1 MB of address space (expandable to 4 MB), and it is capable of executing instructions at high speed. In addition, the CPU core boasts a multiplier for high-speed operation processing. This MCU consumes low power, and supports operating modes that allow additional power control. The MCU also uses an anti-noise configu.

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Full PDF Text Transcription

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Datasheet M16C/64A Group RENESAS MCU R01DS0032EJ0200 Rev.2.00 Feb 07, 2011 1. Overview 1.1 Features The M16C/64A Group microcomputer (MCU) incorporates the M16C/60 Series CPU core and flash memory, employing sophisticated instructions for a high level of efficiency. This MCU has 1 MB of address space (expandable to 4 MB), and it is capable of executing instructions at high speed. In addition, the CPU core boasts a multiplier for high-speed operation processing. This MCU consumes low power, and supports operating modes that allow additional power control. The MCU also uses an anti-noise configuration to reduce emissions of electromagnetic noise and is designed to withstand electromagnetic interference (EMI).
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