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Renesas Electronics Components Datasheet

R5F523T5AGFL Datasheet

MCU

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Datasheet
RX23T Group
Renesas MCUs
R01DS0248EJ0110
Rev.1.10
Jan 13, 2016
40-MHz 32-bit RX MCUs, built-in FPU, 65.6 DMIPS,
12-bit ADC (equipped with three S/H circuits, double data registers, and comparator)
40MHz PWM (three-phase complementary output × 2ch)
Features
32-bit RX CPU core
Max. operating frequency: 40 MHz
Capable of 65.6 DMIPS in operation at 40 MHz
Enhanced DSP: 32-bit multiply-accumulate and 16-bit
multiply-subtract instructions supported
Built-in FPU: 32-bit single-precision floating point
(compliant to IEEE754)
Divider (fastest instruction execution takes two CPU clock
cycles)
Fast interrupt
CISC Harvard architecture with 5-stage pipeline
Variable-length instructions, ultra-compact code
On-chip debugging circuit
Memory protection unit (MPU) supported
Low power design and architecture
Operation from a single 2.7-V to 5.5-V supply
Three low power consumption modes
On-chip code flash memory, no wait states
128-/64-Kbyte capacities
On-board or off-board user programming
On-chip SRAM, no wait states
12 Kbytes of SRAM
DMA
DTC: Four transfer modes
Reset and supply management
Seven types of reset, including the power-on reset (POR)
Low voltage detection (LVD) with voltage settings
Clock functions
Main clock oscillator frequency: 1 to 20 MHz
External clock input frequency: Up to 20 MHz
PLL circuit input: 4 MHz to 12.5 MHz
On-chip low-speed oscillator, on-chip high-speed
oscillator, dedicated on-chip oscillator for the IWDT
Clock frequency accuracy measurement circuit (CAC)
Independent watchdog timer
15-kHz on-chip oscillator produces a dedicated clock
signal to drive IWDT operation.
Useful functions for IEC60730 compliance
Self-diagnostic and disconnection-detection assistance
functions for the A/D converter, clock frequency accuracy
measurement circuit, independent watchdog timer, RAM
test assistance functions using the DOC, etc.
MPC
Multiple locations are selectable for I/O pins of peripheral
functions
PLQP0064KB-C 10 × 10 mm, 0.5 mm pitch
PLQP0052JA-B 10 × 10 mm, 0.65 mm pitch
PLQP0048KB-B 7 × 7 mm, 0.5 mm pitch
Up to 4 communications channels
SCI with many useful functions (2 channels)
Asynchronous mode, clock synchronous mode, smart card
interface mode, simplified SPI, simplified I2C, and
extended serial mode.
I2C bus interface: Transfer at up to 400 kbps (one channel)
RSPI capable of high speed connection (one channel)
Up to 12 extended-function timers
16-bit MTU3: 40MHz operation, input capture, output
compare, three-phase complementary PWM output, CPU-
efficient complementary PWM, phase counting mode (six
channels)
8-bit TMRs (4 channels),
16-bit compare-match timers (4 channels)
12-bit A/D converter: 10ch
On-chip sample-and-hold circuit: 12bit × up to 3 channels
Sampling time can be set for each channel
Self-diagnostic function and analog input disconnection
detection assistance function (compliant to IEC60730)
ADC: three sample-and-hold circuits, double data
registers, comparator (3 channels)
Register write protection function can protect
values in important registers against
overwriting.
Up to 50 pins for general I/O ports
5-V tolerant, open drain, input pull-up
Operating temperature range
 40 to +85C
 40 to +105C
Applications
General industrial and consumer equipment
R01DS0248EJ0110 Rev.1.10
Jan 13, 2016
Page 1 of 98


Renesas Electronics Components Datasheet

R5F523T5AGFL Datasheet

MCU

No Preview Available !

RX23T Group
1. Overview
1. Overview
1.1 Outline of Specifications
Table 1.1 lists the specifications, and Table 1.2 gives a comparison of the functions of the products in different
packages.
Table 1.1 is for products with the greatest number of functions, so the number of peripheral modules and channels will
differ in accordance with the package type. For details, see Table 1.2, Comparison of Functions for Different
Packages.
Table 1.1
Outline of Specifications (1/3)
Classification Module/Function
Description
CPU
CPU
Maximum operating frequency: 40 MHz
32-bit RX CPU (RX v2)
Minimum instruction execution time: One instruction per clock cycle
Address space: 4-Gbyte linear
Register set
General purpose: Sixteen 32-bit registers
Control: Ten 32-bit registers
Accumulator: Two 72-bit registers
Basic instructions: 75 Variable-length instruction format
Floating-point instructions: 11
DSP instructions: 23
Addressing modes: 11
Data arrangement
Instructions: Little endian
Data: Selectable as little endian or big endian
On-chip 32-bit multiplier: 32-bit × 32-bit 64-bit
On-chip divider: 32-bit ÷ 32-bit 32 bits
Barrel shifter: 32 bits
Memory protection unit (MPU)
FPU
Single precision (32-bit) floating point
Data types and floating-point exceptions in conformance with the IEEE754 standard
Memory
ROM
Capacity: 64 K/128 Kbytes
32 MHz, no-wait memory access
32 to 40 MHz: wait states
Programming/erasing method:
Serial programming (asynchronous serial communication), self-programming
RAM
Capacity: 12 Kbytes
40 MHz, no-wait memory access
MCU operating mode
Single-chip mode
Clock
Clock generation circuit
Main clock oscillator, low-speed and high-speed on-chip oscillator, PLL frequency synthesizer, and
IWDT-dedicated on-chip oscillator
Oscillation stop detection: Available
Clock frequency accuracy measurement circuit (CAC): Available
Independent settings for the system clock (ICLK), peripheral module clock (PCLK), and FlashIF clock
(FCLK)
The CPU and system sections such as other bus masters run in synchronization with the system
clock (ICLK): 40 MHz (at max.)
MTU3c runs in synchronization with the PCLKA: 40 MHz (at max.)
Peripheral modules other than MTU3c run in synchronization with the PCLKB: 40 MHz (at max.)
ADCLK operated in S12ADE runs in synchronization with the PCLKD: 40 MHz (at max.)
The flash peripheral circuit runs in synchronization with the FCLK: 32 MHz (at max.)
Resets
RES# pin reset, power-on reset, voltage monitoring reset, independent watchdog timer reset, and
software reset
Voltage detection Voltage detection circuit
(LVDAb)
When the voltage on VCC falls below the voltage detection level, an internal reset or internal interrupt
is generated.
Voltage detection circuit 0 is capable of selecting the detection voltage from 2 levels
Voltage detection circuit 1 is capable of selecting the detection voltage from 9 levels
Voltage detection circuit 2 is capable of selecting the detection voltage from 4 levels
Low power
consumption
Low power consumption
functions
Module stop function
Three low power consumption modes
Sleep mode, deep sleep mode, and software standby mode
Function for lower operating Operating power control modes
power consumption
High-speed operating mode and middle-speed operating mode
R01DS0248EJ0110 Rev.1.10
Jan 13, 2016
Page 2 of 98



Part Number R5F523T5AGFL
Description MCU
Maker Renesas
Total Page 3 Pages
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