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RQJ0305EQDQA - Silicon P-Channel MOS FET

General Description

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Key Features

  • Low gate drive VDSS :.
  • 30 V and 2.5 V gate drive.
  • Low drive current.
  • High speed switching.
  • Small traditional package (MPAK) Outline.

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Full PDF Text Transcription for RQJ0305EQDQA (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for RQJ0305EQDQA. For precise diagrams, and layout, please refer to the original PDF.

RQJ0305EQDQA Silicon P Channel MOS FET Power Switching Features • Low gate drive VDSS : –30 V and 2.5 V gate drive • Low drive current • High speed switching • Small trad...

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5 V gate drive • Low drive current • High speed switching • Small traditional package (MPAK) Outline RENESAS Package code: PLSP0003ZB-A (Package name: MPAK) 3 1 2 Notes: Marking is "EQ". Preliminary Datasheet R07DS0297EJ0300 Rev.3.00 Jan 10, 2014 3 D 2 G S 1 1. Source 2. Gate 3. Drain Absolute Maximum Ratings Item Symbol Drain to source voltage Gate to source voltage Drain current Drain peak current Body - drain diode reverse drain current Channel dissipation VDSS VGSS ID ID(pulse) Note1 IDR Pch Note2 Channel temperature Tch Storage temperature Tstg Notes: 1. PW ≤ 10 μs, Duty cycle ≤ 1% 2. When using the glass epoxy board

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