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UPA2210T1M Datasheet

P-CHANNEL MOS FET

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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
μ PA2210T1M
P-CHANNEL MOS FET
FOR SWITCHING
DESCRIPTION
The μ PA2210T1M is P-channel MOS Field Effect Transistor designed
for power management applications of portable equipments, such as
load switch.
FEATURES
Low on-state resistance
RDS(on)1 = 29 mΩ MAX. (VGS = 4.5 V, ID = 7.2 A)
RDS(on)2 = 41 mΩ MAX. (VGS = 2.5 V, ID = 3.6 A)
RDS(on)3 = 81 mΩ MAX. (VGS = 1.8 V, ID = 3.6 A)
Built-in gate protection diode
• −1.8 V Gate drive available
ORDERING INFORMATION
PART NUMBER
μ PA2210T1M-T1-AT Note
μ PA2210T1M-T2-AT Note
PACKING
8 mm embossed taping
3000 p/reel
PACKAGE
8-pin VSOF (1629)
0.011 g TYP.
Note Pb-free (This product does not contain Pb in external electrode and
other parts.)
PACKAGE DRAWING (Unit: mm)
2.9±0.1
0.65
8
5
A
0.145±0.05
0 to 0.025
1
0.32±0.05
4
0.05 M S A
S 0.05 S
1, 2, 3, 6, 7, 8: Drain
4 : Gate
5 : Source
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
VDSS
20 V
Gate to Source Voltage (VDS = 0 V)
VGSS
m8 V
Drain Current (DC)
Drain Current (pulse) Note1
Total Power Dissipation Note2
Total Power Dissipation (PW = 5 sec) Note2
ID(DC)
ID(pulse)
PT1
PT2
m7.2
m28.8
1.1
2.5
A
A
W
W
Channel Temperature
Tch 150 °C
Storage Temperature
Tstg 55 to +150 °C
Notes 1. PW 10 μs, Duty Cycle 1%
2. Mounted on glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mmt
EQUIVALENT CIRCUIT
Drain
Gate
Body
Diode
Gate
Protection
Diode
Source
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When
this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated
voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G19451EJ1V0DS00 (1st edition)
Date Published September 2008 NS
Printed in Japan
2008


Renesas Electronics Components Datasheet

UPA2210T1M Datasheet

P-CHANNEL MOS FET

No Preview Available !

μ PA2210T1M
ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
Zero Gate Voltage Drain Current
IDSS
Gate Leakage Current
IGSS
Gate to Source Cut-off Voltage
Forward Transfer Admittance Note
Drain to Source On-state Resistance Note
VGS(off)
| yfs |
RDS(on)1
RDS(on)2
RDS(on)3
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Turn-on Delay Time
td(on)
Rise Time
tr
Turn-off Delay Time
td(off)
Fall Time
tf
Total Gate Charge
QG
Gate to Source Charge
QGS
Gate to Drain Charge
Body Diode Forward Voltage Note
QGD
VF(S-D)
Reverse Recovery Time
trr
Reverse Recovery Charge
Qrr
VDS = 20 V, VGS = 0 V
VGS = m8 V, VDS = 0 V
VDS = 10 V, ID = 1 mA
VDS = 10 V, ID = 3.6 A
VGS = 4.5 V, ID = 7.2 A
VGS = 2.5 V, ID = 3.6 A
VGS = 1.8 V, ID = 3.6 A
VDS = 10 V,
VGS = 0 V,
f = 1 MHz
VDD = 10 V, ID = 3.6 A,
VGS = 4.0 V,
RG = 10 Ω
VDD = 16 V,
VGS = 4.5 V,
ID = 7.2 A
IF = 7.2 A, VGS = 0 V
IF = 7.2 A, VGS = 0 V,
di/dt = 45 A/μs
0.45
5
Note Pulsed
TYP.
24
28
37
1350
235
200
10.7
17.1
106
71
16.3
2.7
5.3
0.87
46
15
MAX.
-1
m10
1.5
29
41
81
1.2
UNIT
μA
μA
V
S
mΩ
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
TEST CIRCUIT 1 SWITCHING TIME
TEST CIRCUIT 2 GATE CHARGE
D.U.T.
RG
PG.
VGS ()
0
τ
τ = 1μs
Duty Cycle 1%
RL
VDD
VGS ()
VGS
Wave Form
10%
0
VDS ()
90%
VDS
VDS
Wave Form
0
td(on)
90%
VGS
90%
10% 10%
tr td(off)
tf
ton toff
D.U.T.
IG = 2 mA
PG. 50 Ω
RL
VDD
2 Data Sheet G19451EJ1V0DS


Part Number UPA2210T1M
Description P-CHANNEL MOS FET
Maker Renesas
Total Page 5 Pages
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