UPD70F3826 Overview
In addition to their high real-time responsiveness and one-clock-pitch execution of instructions, the V850ES/JE3-E, V850ES/JF3-E, and V850ES/JG3-E include instructions executed via a hardware multiplier, saturation instructions, and bit manipulation instructions. Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before designing.
UPD70F3826 Key Features
- Main clock oscillation: fX = 3 to 6.25 MHz
- Subclock oscillation: fXT = 32.768 kHz
- Internal oscillation: fR = 220 kHz (TYP.) { General-purpose registers: 32 bits × 32 registers
- CAN :1 channel (μPD70F3829, 70F3833, 70F3837 only)
- Asynchronous serial interface C(UARTC): 3/4 channels
- Clocked serial interface F(CSIF)
- I2C bus interface: { DMA controller: 4 channels { Power save function