X40010, X40011, X40014, X40015
Low VCC detection circuitry protects the user’s system
from low voltage conditions, resetting the system when
VCC falls below the minimum VTRIP1 point.
RESET/RESET is active until VCC returns to proper
operating level and stabilizes. A second voltage monitor
circuit tracks the unregulated supply to provide a power
fail warning or monitors different power supply voltage.
Three common low voltage combinations are available,
however, Intersil’s unique circuits allows the threshold
for either voltage monitor to be reprogrammed to meet
special needs or to fine-tune the threshold for applica-
tions requiring higher precision.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable time
out interval, the device activates the WDO signal. The
user selects the interval from three preset values. Once
selected, the interval does not change, even after
cycling the power.
The device features a 2-wire interface and software pro-
tocol allowing operation on an I2C® bus.
Dual Voltage Monitors
Expected System Voltages
5V; 3V or 3.3V
3V; 3.3V; 1.8V
3V; 3.3V; 1.5V
3V or 3.3V; 1.1 or 1.2V
RESET = X40010
RESET = X40011
RESET = X40014
RESET = X40015
*Voltage monitor requires VCC to operation. Others are independent of VCC.
SOIC TSSOP Name
1 3 V2FAIL V2 Voltage Fail Output. This open drain output goes LOW when V2MON is less than VTRIP2 and
goes HIGH when V2MON exceeds VTRIP2. There is no power up reset delay circuitry on this pin.
2 4 V2MON V2 Voltage Monitor Input. When the V2MON input is less than the VTRIP2 voltage, V2FAIL goes
LOW. This input can monitor an unregulated power supply with an external resistor divider or can
monitor a second power supply with no external components. Connect
not used.The V2MON comparator is supplied by V2MON (X40010/11)
V2MON to VSS
or by VCC Input
3 5 RESET/ RESET Output. (X40011/15) This is an active LOW, open drain output which goes active whenever
RESET VCC falls below VTRIP1. It will remain active until VCC rises above VTRIP1 and for the tPURST thereafter.
RESET Output. (X40010/14) This is an active HIGH CMOS output which
falls below VTRIP1. It will remain active until VCC rises above VTRIP1 and
goes active whenever VCC
for the tPURST thereafter.
4 6 VSS Ground
5 7 SDA Serial Data. SDA is a bidirectional pin used to transfer data into and out of the device. It has an open
drain output and may be wire ORed with other open drain or open collector outputs. This pin requires
a pull up resistor and the input buffer is always active (not gated).
Watchdog Input. A HIGH to LOW transition on the SDA (while SCL is toggled from HIGH to
LOW and followed by a stop condition) restarts the Watchdog timer. The absence of this transi-
tion within the watchdog time out period results in WDO going active.
FN8111 Rev 0.00
March 28, 2005
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