uPD16364 Datasheet | Renesas

DESCRIPTION The µ PD16364 is a high-voltage CMOS driver for EL display. It consists of 4 × 40/8 × 20-bit data latch, 160-bits data latch, 160-bit level shifter, and a high-voltage CMOS driver. The logic circuit operates on 5-V power supply (CMOS level input), so that it can be connected to a micro-controller. The driver block is prised of 60 V, 25 m A MAX. high-voltage output buffer, and both the logic block and driver block employ a CMOS, allowing operation with low power consumption. FEATURES - High-voltage Full CMOS process - High-voltage output (60 V, 25 m A MAX.) - 4 × 40/8 × 20-bit data latch (4/8-bit data input) - High-speed data transfer (f CLK = 16 MHz: in cascade connection) - Wide operating temperature range (TA = - 40 to +85°C) ORDERING INFORMATION Part Number µ PD16364N -××× Package TCP (TAB package) Remark The TCP’s external shape is customized. To order the required shape, please contact one of our sales representatives. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. S14000EJ2V0DS00 (2nd edition) Date Published November 2002 NS CP(K) Printed in Japan The mark 5 shows major revised points. µ PD16364 1. BLOCK DIAGRAM DST SCK EIO1 EIO2 Control Circuit 20/40-bit Latch Selector 20/40 4 X 20/8 X 20-bit Data Latch Data MPX 4/8 160-bit Data Latch 160-bit Level Shifter 160-bit HIgh-Voltage CMOS Driver OUT1OUT2 OUT3 OUT4 Remark /xxx indicates active low signal. OUT OUTOUT OUT 157 158 159 160 BS L,/R D0 D7 REV VDD1 VSS1 VDD2 VSS2 Data Sheet S14000EJ2V0DS µ...