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Renesas Electronics Components Datasheet

HD74LV2G125A Datasheet

Dual Bus Buffer

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HD74LV2G125A
Dual Bus Buffer with 3–state Output
REJ03D0099–0500Z
(Previous ADE-205-347D (Z))
Rev.5.00
Sep.30.2003
Description
The HD74LV2G125A has dual bus buffer with 3–state output in a 8 pin package. Output is disabled when
the associated output enable (OE) input is high. To ensure the high impedance state during power up or
power down, OE should be connected to VCC through a pull-down resistor; the minimum value of the
resistor is determined by the current souring capability of the driver. Low voltage and high-speed operation
is suitable for the battery powered products (e.g., notebook computers), and the low power consumption
extends the battery life.
Features
The basic gate function is lined up as Renesas uni logic series.
Supplied on emboss taping for high-speed automatic mounting.
Electrical characteristics equivalent to the HD74LV125A
Supply voltage range : 1.65 to 5.5 V
Operating temperature range : –40 to +85°C
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V, Output : Z)
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
All the logical input has hysteresis voltage for the slow transition.
Ordering Information
Part Name
Package Type
Package Code Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LV2G125AUSE SSOP-8 pin
TTP-8DBV
US
E (3,000 pcs/reel)
Rev.5.00, Sep.30.2003, page 1 of 9


Renesas Electronics Components Datasheet

HD74LV2G125A Datasheet

Dual Bus Buffer

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HD74LV2G125A pdf
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HD74LV2G125A
Outline and Article Indication
• HD74LV2G125A
Index band
Lot No.
SSOP-8
Function Table
Inputs
OE
L
L
H
H : High level
L : Low level
X : Immaterial
Z : High impedance
A
H
L
X
YMW
L25
Y : Year code
(the last digit of year)
M : Month code
W : Week code
Marking
Output Y
H
L
Z
Rev.5.00, Sep.30.2003, page 2 of 9


Part Number HD74LV2G125A
Description Dual Bus Buffer
Maker Renesas Technology
Total Page 10 Pages
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HD74LV2G125A pdf
HD74LV2G125A Datasheet PDF
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