dual bus buffer inverted.
* The basic gate function is lined up as Renesas uni logic series.
* Supplied on emboss taping for high-speed automatic mounting.
* TTL compatible input level.
The HD74LV2GT240A has dual bus buffer inverted with 3
–state output in an 8 pin package. Two inverters are included in one circuit. Each circuit can be independently controlled by the enable signal 1OE or 2OE, which enables outputs whe.
Image gallery
TAGS
Manufacturer
Related datasheet
Download (Size : 127.67KB)