BU90R104 Overview
The BU90R104 receiver operates from 8MHz to 112MHz wide clock range. The BU90R104 converts the LVDS serial data streams back into 35bits of LVCMOS parallel data. Data is transmitted seven times (7X) stream and reduce the cable number by 3(1/3) or less.
BU90R104 Key Features
- User programmable LVCMOS data output triggering timing by using either rising or falling edge of clock
- 30bit LVDS transmitter is remended to use BU8254KVT
- Block Diagram