74HC691 Datasheet | STMicroelectronics

DESCRIPTION The HC690/691/692/693 are high speed CMOS COUNTER/REGISTER fabricated in silicon gate C2MOS technology. They have the same high speed performance of LSTTL bined with true CMOS low power consumption. The internal circuit is posed of 3 stages including buffer output, which offers high noise immunity and stable output. These devices incorporate a synchronous counter, four-bit D-type register, and quadruple two-line to one-line multiplexers with three-state outputs in a single 20-pin package. The counter can be programmed from the data inputs and have enable P and enable T inputs and a ripplecarry output for easy expansion. The register/counter select input, R/C, selects the counter when low or the register when high for the threestate outputs, QA, QB, QC, and QD. If the LOAD input (LOAD) is held ”L” DATA input (AD) are loaded in to the internal counter at positive edge of counter clock input (CCK). In the counter mode, internal counter counts up at the positive of the counter clock. If the counter clear input (CCLR) is held ”L”, the internal counter is cleared ( synchronously to the counter clock for HC692/HC693, and asynchronously for HC690/HC691). The internal March 1993 - . . . B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HCXXXF1R M74HCXXXM1R M74HCXXXB1R M74HCXXXC1R PIN CONNECTIONS (top view) NC = No Internal Connection 1/23 M54/M74HC690/691/692/693 counter’s outputs are stored in the output register at the positive edge of the register clock (RCK). If the register clear input (RCLR) is held ”L” the register is cleared (synchronously to register clock for INPUT AND OUTPUT EQUIVALENT CIRCUIT HC692/HC693 and asynchronously for HC690/HC691). All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN DESCRIPTION PIN No 3 to 6 7, 14 15 to 18 1 2 11 8 9 19 10 20 SYMBOL A to D ENT, ENP QA to QD CCLR CCK R/C RCLR RCK RCO GND VCC NAME AND...