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74V2T125 - DUAL BUS BUFFER

Description

The 74V2T125 is an advanced high-speed CMOS DUAL BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology.

3-STATE control input nG has to be set HIGH to place the output into the high impedance state.

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74V2T125 DUAL BUS BUFFER (3-STATE) PRELIMINARY DATA HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C www.DataSheet4U.com s COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) s POWER DOWN PROTECTION ON INPUTS AND OUTPUTS s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V s IMPROVED LATCH-UP IMMUNITY s s SOT23-8L SOT323-8L ORDER CODES PACKAGE SOT23-8L SOT323-8L T&R 74V2T125STR 74V2T125CTR DESCRIPTION The 74V2T125 is an advanced high-speed CMOS DUAL BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology.
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