Datasheet4U Logo Datasheet4U.com

74V2T70 - TRIPLE BUFFER

Description

The 74V2T70 is an advanced high-speed CMOS TRIPLE BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output.

📥 Download Datasheet

📁 Similar Datasheet

  • 74V2T00 - DUAL 2-INPUT NAND GATE (ST Microelectronics)
  • 74V2T03 - DUAL 2-INPUT OPEN DRAIN NAND GATE (ST Microelectronics)
  • 74V2T04 - TRIPLE INVERTER (ST Microelectronics)
  • 74V2T07 - TRIPLE BUFFER (ST Microelectronics)
  • 74V2T08 - DUAL 2-INPUT AND GATE (ST Microelectronics)
  • 74V2T241 - DUAL BUS BUFFER (ST Microelectronics)
  • 74V2G03 - DUAL 2-INPUT OPEN DRAIN NAND GATE (ST Microelectronics)
  • 74VCX00 - Low Voltage Quad 2-Input NAND Gate (Fairchild Semiconductor)
  • 74VCX08 - Low Voltage Quad 2-Input AND Gate (Fairchild Semiconductor)
  • 74VCX132 - Low Voltage Quad 2-Input NAND Gate (Fairchild Semiconductor)
Other Datasheets by STMicroelectronics

Full PDF Text Transcription

Click to expand full text
74V2T70 TRIPLE BUFFER HIGH SPEED: tPD = 3.6ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C www.DataSheet4U.com s COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) s POWER DOWN PROTECTION ON INPUT s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V s IMPROVED LATCH-UP IMMUNITY s s SOT23-8L ORDER CODES PACKAGE SOT23-8L T&R 74V2T70STR DESCRIPTION The 74V2T70 is an advanced high-speed CMOS TRIPLE BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output.
Published: |