92R195B Datasheet | STMicroelectronics

.. ST92195B 32-64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER DATA BRIEFING s s s s s s s s s s s s s s s s s s s s s Register File based 8/16 bit Core Architecture with RUN, WFI, SLOW and HALT modes 0°C to +70°C operating temperature range Up to 24 MHz. operation @ 5V±10% Min. instruction cycle time: 165ns at 24 MHz. 32, 48, 56 or 64 Kbytes ROM 256 bytes RAM of Register file (accumulators or index registers) 256 bytes of on-chip static RAM 2, 6 or 8 Kbytes of TDSRAM (Teletext and Display Storage RAM) 28 fully programmable I/O pins Serial Peripheral Interface Flexible Clock controller for OSD, Data Slicer and Core clocks running from a single low frequency external crystal. Enhanced display controller with 26 rows of 40/80 characters - Serial and Parallel attributes - 10x10 dot matrix, 512 ROM characters, definable by user - 4/3 and 16/9 supported in 50/60Hz and 100/ 120 Hz mode - Rounding, fringe, double width, double height, scrolling, cursor, full background color, halfintensity color, translucency and half-tone modes Teletext unit, including Data Slicer, Acquisition Unit and up to 8 Kbytes RAM for data storage VPS and Wide Screen Signalling slicer (on some devices) Integrated Sync Extractor and Sync Controller 14-bit Voltage Synthesis for tuning reference voltage Up to 6 external interrupts plus one Non Maskable Interrupt 8 x 8-bit programmable PWM outputs with 5V open-drain or push-pull capability 16-bit watchdog timer with 8-bit prescaler One 16-bit standard timer with 8-bit prescaler 4-channel A/D converter; 5-bit guaranteed PSDIP56 TQFP64 See end of document for ordering information Rich instruction set and 14 addressing modes Versatile development tools, including Assembler, Linker, C-piler, Archiver, Source Level Debugger and hardware emulators with Real-Time Operating System available from third parties s Pin-patible EPROM and OTP devices available Device Summary s s Device ST92195B1 ST92195B2...