fifo register.
wider than 4 bits, the DIR and the DOR outputs must be gated together with AND gates. Their outputs drive the SI and SO inputs in parallel, if expanding is done in both .
EXPANSION, 4 BITS
–WIDE
–BY
–16 N
–BITS LONG.
7/12
HCC/HCF.
OF ”B” SERIES CMOS DEVICES”
READY) indicates if the FIFO contains data. As the earliest data are removed from the bottom of the data stack (the output end), all data entered later will automatically propagate (ripple) toward the output.
EY (Plastic.
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