Description
The 74LCX125 device is a low-voltage CMOS quad bus buffer manufactured with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
It is ideal for low-power and highspeed 3.3 V applications and can be interfaced to a 5 V signal environment for both inputs and outputs.
Features
- 5 V tolerant inputs and outputs.
- High speed.
- tPD = 5.2 ns (max. ) at VCC = 3 V.
- Power-down protection on inputs and outputs.
- Symmetrical output impedance.
- |IOH| = IOL = 24 mA (min. ) at VCC = 3 V.
- PCI bus levels guaranteed at 24 mA.
- Balanced propagation delay.
- tPLH ≅ tPHL.
- Operating voltage range.
- VCC (opr. ) = 2.0 V to 3.6 V.
- Pin and function compatible with 74 series 125.
- Latch-up performance exceeds 500 mA
(JESD 17.