M24256-A lines equivalent, 256 kbit serial i c bus eeprom with two chip enable lines.
ern applied to its Chip Enable pins.
Table 4. Most Significant Byte
b15 b14 b13 b12 b1.
where this line is used by slaves to synchronize the bus to a slower clock, the master must have an open drain output, a.
These I 2C-compatible electrically erasable programmable memory (EEPROM) devices are organized as 32Kx8 bits, and operate down to 2.5 V (for the M24256-AW), and down to 1.8 V (for the M24256-AR). The M24256-A is available in Plastic Dual-in-Line, Pla.
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