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M27128A Datasheet

NMOS 128K UV EPROM

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Jameco Part Number 39933
M27128A
NMOS 128 Kbit (16Kb x 8) UV EPROM
NOT FOR NEW DESIGN
s FAST ACCESS TIME: 200ns
s EXTENDED TEMPERATURE RANGE
s SINGLE 5 V SUPPLY VOLTAGE
s LOW STANDBY CURRENT: 40mA max
s TTL COMPATIBLE DURING READ and
PROGRAM
s FAST PROGRAMMING ALGORITHM
s ELECTRONIC SIGNATURE
s PROGRAMMING VOLTAGE: 12V
DESCRIPTION
The M27128A is a 131,072 bit UV erasable and
electrically programmable memory EPROM. It is
organized as 16,384 words by 8 bits.
The M27128A is housed in a 28 Pin Window Ce-
ramic Frit-Seal Dual-in-Line package. The trans-
parent lid allows the user to expose the chip to
ultraviolet light to erase the bit pattern. A new pat-
tern can then be written to the device by following
the programming procedure.
28
1
FDIP28W (F)
Figure 1. Logic Diagram
VCC VPP
14
A0-A13
8
Q0-Q7
P M27128A
E
G
VSS
AI00769B
November 2000
This is information on a product still in production but not recommended for new designs.
1/10


STMicroelectronics Electronic Components Datasheet

M27128A Datasheet

NMOS 128K UV EPROM

No Preview Available !

M27128A
Table 2. Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
TA Ambient Operating Temperature
grade 1
grade 6
0 to 70
–40 to 85
°C
TBIAS
Temperature Under Bias
grade 1
grade 6
–10 to 80
–50 to 95
°C
TSTG
Storage Temperature
–65 to 125
°C
VIO Input or Output Voltages
–0.6 to 6.25
V
VCC Supply Voltage
–0.6 to 6.25
V
VA9 A9 Voltage
–0.6 to 13.5
V
VPP Program Supply
–0.6 to 14
V
Note: Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause
permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those
indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for ex tended periods
may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.
Figure 2. DIP Pin Connections
VPP
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
VSS
1 28
2 27
3 26
4 25
5 24
6 23
7 22
M27128A
8 21
9 20
10 19
11 18
12 17
13 16
14 15
VCC
P
A13
A8
A9
A11
G
A10
E
Q7
Q6
Q5
Q4
Q3
AI00770
DEVICE OPERATION
The seven modes of operation of the M27128A are
listed in the Operating Modes table. A single 5V
power supply is required in the read mode. All
inputs are TTL levels except for VPP and 12V on A9
for Electronic Signature.
Read Mode
The M27128A has two control functions, both of
which must be logically satisfied in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, inde-
pendent of device selection.
Assuming that the addresses are stable, address
access time (tAVQV) is equal to the delay from E to
output (tELQV). Data is available at the outputs after
the falling edge of G, assuming that E has been low
and the addresses have been stable for at least
tAVQV-tGLQV.
Standby Mode
The M27128A has a standby mode which reduces
the maximum active power current from 85mA to
40mA. The M27128Ais placed in the standby mode
by applying a TTL high signal to the E input. When
in the standby mode, the outputs are in a high
impedance state, independent of the G input.
Two Line Output Control
Because EPROMs are usually used in larger mem-
ory arrays, this product features a 2 line control
function which accommodates the use of multiple
memory connection. The two line control function
allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
2/10


Part Number M27128A
Description NMOS 128K UV EPROM
Maker STMicroelectronics
Total Page 10 Pages
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