* of the memory device are summarized in Table 3. The hardware write protection, controlled by the W pin, restricts write access to the Status Register M35080 VSS S W Q 1 2 3 4 8 7 6 5 AI02144B VCC D C NC Note: 1. NC = Not Connected. The memory is organized in pages of 32 bytes. However, the first
M35080
139.28 KB
8-kbit serial spi bus eeprom.
M35080 8 Kbit Serial SPI Bus EEPROM With Incremental Registers PRELIMINARY DATA s Compatible with SPI Bus Serial Interface (Positive Clock SPI Modes).
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